For example, a data holding circuit that has three flip-flops and a majority logic circuit outputting a signal according to a logic value having a majority among outputs thereof is disclosed in PTL 1. A configuration in which a C element circuit is provided between two master latch circuits and two slave latch circuits is disclosed in PTL 2. The C element circuit includes logic to hold an immediately previous value, even when holding data of one of the two master latch circuits is inverted due to an error. A cause of an error in an electronic apparatus and countermeasures thereof are described in NPL 1.